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GS832018GT - 36Mb Sync Burst SRAMs

Download the GS832018GT datasheet PDF. This datasheet also covers the GS832018 variant, as both devices belong to the same 36mb sync burst srams family and are provided as variant models within a single manufacturer datasheet.

General Description

Applications The GS832018/32/36T is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter.

Key Features

  • FT pin for user-configurable flow through or pipeline operation.
  • Single Cycle Deselect (SCD) operation.
  • 2.5 V or 3.3 V +10%/.
  • 10% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipeline mode.
  • Byte Write (BW) and/or Global Write (GW) operation.
  • Internal self-timed write cycle.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS832018_ETC.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS832018GT
Manufacturer GSI Technology
File Size Direct Link
Description 36Mb Sync Burst SRAMs
Datasheet download datasheet GS832018GT Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Preliminary GS832018/32/36T-250/225/200/166/150/133 100-Pin TQFP Commercial Temp Industrial Temp 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Features • FT pin for user-configurable flow through or pipeline operation • Single Cycle Deselect (SCD) operation • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.