Datasheet4U Logo Datasheet4U.com

GS84032CGT - 4Mb Sync Burst SRAMs

This page provides the datasheet information for the GS84032CGT, a member of the GS84018CGT 4Mb Sync Burst SRAMs family.

Description

Applications The GS84018/32/36CGT is a 4,718,592-bit (4,194,304-bit for x32 version) high performance synchronous SRAM with a 2bit burst address counter.

Features

  • FT pin for user-configurable flow through or pipelined operation.
  • Single Cycle Deselect (SCD) operation.
  • 3.3 V ±10% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipelined mode.
  • Byte Write (BW) and/or Global Write (GW) operation.
  • Common data inputs and data outputs.
  • Clock con.

📥 Download Datasheet

Datasheet preview – GS84032CGT

Datasheet Details

Part number GS84032CGT
Manufacturer GSI Technology
File Size 310.33 KB
Description 4Mb Sync Burst SRAMs
Datasheet download datasheet GS84032CGT Datasheet
Additional preview pages of the GS84032CGT datasheet.

📁 Similar Datasheet

  • GS8000 - DVI / HDMI Extender (Gennum Corporation)
  • GS8041 - 14.5KHZ CMOS Rail-to-Rail I/O Opamp (GAINSIL)
  • GS8042 - 14.5KHZ CMOS Rail-to-Rail I/O Opamp (GAINSIL)
  • GS8043 - 14.5KHZ CMOS Rail-to-Rail I/O Opamp (GAINSIL)
  • GS8043NH - 14.5KHZ CMOS Rail-to-Rail I/O Opamp (GAINSIL)
  • GS8043NL - 14.5KHZ CMOS Rail-to-Rail I/O Opamp (GAINSIL)
  • GS8051 - 250MHZ CMOS Rail-to-Rail Output Opamps (GAINSIL)
  • GS8051N - 250MHZ CMOS Rail-to-Rail Output Opamps (GAINSIL)
  • GS8052 - 250MHZ CMOS Rail-to-Rail Output Opamps (GAINSIL)
  • GS8052N - 250MHZ CMOS Rail-to-Rail Output Opamps (GAINSIL)
Other Datasheets by GSI Technology

Full PDF Text Transcription

Click to expand full text
GS84018/32/36CGT-250/200/166/150 TQFP Commercial Temp Industrial Temp 256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs 250 MHz–150 MHz 3.3 V VDD 3.3 V and 2.5 V I/O Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) operation • 3.3 V ±10% core power supply • 2.5 V or 3.
Published: |