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GS8662D09BD Datasheet PDF

GSI Technology GS8662D09BD

The GS8662D08/09/18/36BD are built in compliance with the SigmaQuad-II SRAM pinout standard for Separate I/O synchronous SRAMs. They are 75,497,472-bit (72Mb) SRAMs.
Part No. GS8662D09BD
Datasheet GS8662D09BD Download
Manufacturer
GSI Technology
Description 72Mb SigmaQuad-II Burst of 4 SRAM
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GS8662D09BD datasheet page 1 preview

FEATURES

● Simultaneous Read and Write SigmaQuad™ Interface
● JEDEC-standard pinout and package
● Dual Double Data Rate interface
● Byte Write controls sampled at data-in time
● Burst of 4 Read and Write
● 1.8 V +100/–100 mV core power supply
● 1.5 V or 1.8 V HSTL Interface
● Pipelined read operation
● Fully coherent read and write pipelines
● ZQ pin for programmable output drive strength
● IEEE 1149.1 JTAG-compliant Boundary Scan
● Pin-compatible with present 144 Mb devices
● 165-bump, 13 mm x 15 mm, 1 mm bump pitch BGA package
● RoHS-compliant 165-bump BGA package available SigmaQuad™ Family Overview They are 75,497,472-bit (72Mb) SRAMs. The GS8662D08/09
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