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GS881Z36T - 8Mb Pipelined and Flow Through Synchronous NBT SRAMs

Download the GS881Z36T datasheet PDF. This datasheet also covers the GS881Z18T variant, as both devices belong to the same 8mb pipelined and flow through synchronous nbt srams family and are provided as variant models within a single manufacturer datasheet.

Features

  • 512K x 18 and 256K x 36 configurations.
  • User-configurable Pipelined and Flow Through mode.
  • NBT (No Bus Turn Around) functionality allows zero wait.
  • Read-Write-Read bus utilization.
  • Fully pin-compatible with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs.
  • IEEE 1149.1 JTAG-compatible Boundary Scan.
  • On-chip write parity checking; even or odd selectable.
  • Pin-compatible with 2M, 4M and 16M devices.
  • 3.3 V.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS881Z18T-GSITechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS881Z36T
Manufacturer GSI Technology
File Size 520.29 KB
Description 8Mb Pipelined and Flow Through Synchronous NBT SRAMs
Datasheet download datasheet GS881Z36T Datasheet

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Other Datasheets by GSI Technology

Part Number Description
GS881Z36AT 9Mb Pipelined and Flow Through Synchronous NBT SRAM
GS881Z36BD 9Mb Pipelined and Flow Through Synchronous NBT SRAM
GS881Z36BD-V 9Mb Pipelined and Flow Through Synchronous NBT SRAM
GS881Z36BGD 9Mb Pipelined and Flow Through Synchronous NBT SRAM
GS881Z36BGD-V 9Mb Pipelined and Flow Through Synchronous NBT SRAM

Full PDF Text Transcription

Click to expand full text
Preliminary GS881Z18/36T-11/100/80/66 100-Pin TQFP 8Mb Pipelined and Flow Through 100 MHz–66 MHz Commercial Temp Industrial Temp Synchronous NBT SRAMs 3.3 V VDD 2.5 V and 3.3 V VDDQ Features • 512K x 18 and 256K x 36 configurations • User-configurable Pipelined and Flow Through mode • NBT (No Bus Turn Around) functionality allows zero wait • Read-Write-Read bus utilization • Fully pin-compatible with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs • IEEE 1149.1 JTAG-compatible Boundary Scan • On-chip write parity checking; even or odd selectable • Pin-compatible with 2M, 4M and 16M devices • 3.3 V +10%/–5% core power supply • 2.5 V or 3.
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