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G2992B - 2A DDR Bus Termination Regulator

General Description

The G2992B is a linear regulator designed to meet the JEDEC SSTL-18, SSTL-2 and SSTL-3 (Series Stub Termi

Key Features

  • VCNTL Supply Voltage: 3V to 5.5V.
  • Termination Supply Voltage: 1.2V to 3.6V.
  • Support DDR I(1.25VTT), DDR II (0.9 VTT), and DDR III(0.75VTT) Requirements.
  • Requires Only 20µF Ceramic Output Capacitor.
  • Low Output Offset.
  • 2A Source and Sink Current.
  • Low External Component Count.
  • No Inductor Required.
  • Thermal Shutdown Protection.
  • Over Current Protection.
  • Suspend to RAM (STR) Function with High-impedance.

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Datasheet Details

Part number G2992B
Manufacturer Global Mixed-mode Technology
File Size 84.21 KB
Description 2A DDR Bus Termination Regulator
Datasheet download datasheet G2992B Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Global Mixed-mode Technology G2992B 2A DDR Bus Termination Regulator Features „ VCNTL Supply Voltage: 3V to 5.5V „ Termination Supply Voltage: 1.2V to 3.6V „ Support DDR I(1.25VTT), DDR II (0.9 VTT), and DDR III(0.