VRS550
Description
Size (bytes) 1 2 1 2 1 2 2 2 2 2 2 2 1 2 1 2 1 2 2 2 2 3 2 3 1 2 2 3 1 1 1 1 1 1 2 2 1 2 1 1 2 3 1 1 2 3 2 2 2 3 3 3 1 2 2 3 3 3 3 2 3 1 Instr. Cycles 1 1 1 1 1 1 2 2 2 2 1 2 1 1 1 1 1 2 1 1 2 2 2 2 1 2 1 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 Mnemonic Description Size (bytes) 1 2 1 2 1 2 1 2 1 2 1 2 1 1 2 1 1 1 2 1 1 1 1 1 1 2 1 2 2 3 1 2 1 2 2 3 1 2 1 2 2 3 1 1 1 1 1 1 1 Instr.
Key Features
- General 80C51/80C52 pin compatible 12 clock periods per machine cycle 8k / 16k on-chip Flash memory 256 Bytes on-chip data RAM 32 I/O lines on four 8-bit ports Full duplex serial port (UART) 3, 16-bit Timers/Counters Watch Dog Timer 8-bit Unsigned Division / Multiply BCD arithmetic Direct and Indirect Addressing Two levels of interrupt priority and nested interrupts Power saving modes Code protection function Operates at a clock frequency of up to 25MHz Low EMI (inhibit ALE) Programming voltage: 12V Industrial Temperature range (-40° C to +85° C) 5V and 3V versions available (see Ordering information.) FIGURE 2: VRS550 / VRS560 PLCC AND QFP PINOUT DIAGRAMS T2EX/P1.1 P0.0/AD0 P0.2/AD2 P0.1/AD1 T2/P1.0
