GVXO-54 Description
3.3V VCXO plementary LV-PECL GVXO-54 2011/65/EU 7.50 (max) 5.20 (max) 2.0 (max) SOLDER PAD LAYOUT 1.40 2.54 2.54 123 654 2.46 654 123 2.00 2.20 2.00 2.54 2.54 1.80 1.80 1.80 TOP VIEW PAD CONNECTION 1 Control voltage 2 Enable / disable 3 Ground 4 Output 1 (Q).
GVXO-54 Key Features
- Open ‘1’ level VIH ‘0’ level VIL
- Note: ‘0’ level = VIL ≤ VCC-1.60V, ‘1’ level = VIH ≥ VCC -1.10V
- Option Codes
- Frequency pullability (min): ±150ppm Other
- Supply voltage (VDD): +3.3V (±5%)
- Output
- Test load: Logic levels
- Rise / fall time: 1.5ns max (20% ~ 80%VP-P)
- Phase jitter: 5ps max (12kHz~20MHz)
- Standard. Optional