RFM50 Description
General Introduction 5B RFM50 module series’ design is based on the high performance RF50 SoC chip, It include a CIP-51 core‘ MCU and 100mW transceiver. It operate at 433/470/868/915 MHz ISM band, ply with FCC, ETSI regulation.
RFM50 Key Features
- Typical sleep mode current < 0.1 μA; retains state and RAM contents over full supply range; fast wakeup of < 2 μs -Less
- Up to 300 ksps -Up to 18 external inputs -External pin or internal VREF (no external capacitor required) -Built-in tempe
- Programmable hysteresis and response time -Configurable as interrupt or reset source -Low current (< 0.5 μA)
- On-chip debug circuitry facilitates full-speed, non-intrusive in-system debug (No emulator required) -Provides breakpoin
- Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks -Up to 25 MIPS throughput with
- 4352 bytes internal data RAM (256 + 4096) -64 kB Flash; In-system programmable in 1024-byte sectors-1024 bytes are reser
- Frequency range = 433,470,868,915 MHz ISM Band -Sensitivity = -121 dBm -FSK, GFSK, and OOK modulation -Max output power
- 18.5mA receive -18 mA @+1 dBm transmit
- 40mA @+13 dBm transmit
- 100mA @+20 dBm transmit -Data rate = 0.123 to 256 kbps -Auto-frequency calibration (AFC)