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HCTL-2020 Datasheet PDF

Hewlett-Packard HCTL-2020

The HCTL-2020 also contains quadrature decoder output signals and cascade signals for use with many standard counter ICs. The HCTL20XX family provides LSTTL compatible tri-state output buffers.
Part No. HCTL-2020
Datasheet HCTL-2020 Download
Manufacturer
Hewlett-Packard
Description Quadrature Decoder/Counter Interface ICs
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HCTL-2020 datasheet page 1 preview

FEATURES

● Interfaces Encoder to Microprocessor
● 14 MHz Clock Operation
● Full 4X Decode
● High Noise Immunity: Schmitt Trigger Inputs Digital Noise Filter
● 12 or 16-Bit Binary Up/ Down Counter
● Latched Outputs
● 8-Bit Tristate Interface
● 8, 12, or 16-Bit Operating Modes
● Quadrature Decoder Output Signals, Up/Down and Count
● Cascade Output Signals, Up/ Down and Count
● Substantially Reduced System Software

APPLICATIONS

● Interface Quadrature Incremental Encoders to Microprocessors
● Interface Digital Potentiometers to Digital Data Input Buses

DESCRIPTION

The HCTL-2000, 2016, 2020 are CMOS ICs that perform the quadrature decoder, counter, and bus interface function. The HCTL-20XX family is designed to improve system performance Devices Part Number HCTL-2000 HCTL-2016 HCTL-2020

DESCRIPTION

12-bit counter. 14 MHz clock operation. All features of the HCTL-2000. 16-bit counter. All features of the HCTL-2016. Quadrature decoder output signals. Cascade output signals. Package Drawing A A B ESD WARNING: Standard CMOS handling precautions should be observed with the HCTL-20XX family ICs.
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