TJ2996 Datasheet | HTC KOREA

DDR Termination Regulator Features z z z z z z z z Source and sink current Low output voltage offset No external resistors required Linear topology Suspend to Ram (STR) functionality Low external ponent count Thermal Shutdown Available in SOP8, SOP8-PP Packages SOP8 / SOP8-PP PKG APPLICATION z DDR-I, DDR-II and DDR-Ⅲ Termination Voltage z SSTL-2 and SSTL-3 Termination z HSTL Termination ORDERING INFORMATION Device TJ2996D TJ2996DP Package SOP8 SOP8-PP DESCRIPSION The TJ2996 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load...