GENERAL DESCRIPTION
In addition the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid. The HMN2M8D uses extremely low standby current CMOS SRAM ’s, coupled with small lithium coin cells to provide nonvolatility without long write-cycle times and the write-cycle limitations associated with EEPROM. FEATURES
w Access time : 70, 85, 120, 150ns w High-density design : 16Mbit Design w Battery internally isolated until power is applied w Industry-standard 36-pin 2,048K x 8 pinout w Unlimited write cycles w Data retention in the absence of VCC w 5-years minimum data retention in absence of power w Automatic write-protection during power-up/power-down cycles w Data is automatically protected during power loss w Industrial temperature operation w Timing 70 ns 85 ns 120 ns 150 ns - 70 - 85 -100 -150 PIN ASSIGNMENT NC A20 A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A...