GENERAL DESCRIPTION
PD0 and PD1 identify the module’s density allowing interchangeable use of alternate density, industry- standard modules. Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes independently. Output enable(/OE) and write enable(/WE) can set the memory input and output. Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW. For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from a single +3.3V DC power supply and all inputs and outputs are fully TTL-compatible. Reading is FEATURES
w Access times : 8, 10, 12, 15 and 20ns w High-density 512KByte design w High-reliability, high-speed design w Single + 3.3V ±0.3V power supply w Easy memory expansion with /CE and /OE functions w All inputs and outputs are TTL-compatible w Industry-standard pinout w...
Hanbit Electronics
