HSD4M64B4 Overview
The HSD4M64B4 is a 4M x 64 bit Synchronous Dynamic RAM high density memory module. The module consists of four CMOS 1M x 16 bit with 4banks Synchronous DRAMs in TSOP-II 400mil packages on a 144-pin glass-epoxy substrate. Two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM.
HSD4M64B4 Key Features
- F : Auto Self-Refresh with Low Power
- Burst mode operation
- Auto & self refresh capability (4096 Cycles/64ms)
- LVTTL patible inputs and outputs
- Single 3.3V ±0.3V power supply
- MRS cycle with address key programs
- Latency (Access from column address)
- Burst length (1, 2, 4, 8 & Full page)
- Data scramble (Sequential & Interleave)
- JEDEC standard