GENERAL DESCRIPTION
In addition the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid. The HMN1288J uses extremely low standby current CMOS SRAM’s, coupled with small lithium coin cells to provide nonvolatility without long write-cycle times and the write-cycle limitations associated with EEPROM. FEATURES
w Access time : 55, 70 ns w High-density design : 4Mbit Design w Battery internally isolated until power is applied w Industry-standard 34-pin 128K x 8 pinout w Unlimited write cycles w Data retention in the absence of VCC w 10-years minimum data retention in absence of power w Automatic write-protection during power-up/power-down cycles w Data is automatically protected during power loss w Conventional SRAM operation; unlimited write cycles /NBW A(15) A(16) /RST VCC /WE /OE /CE D(7) D(6) D(5) D(4) D(3) D(2) D(1) D(0) VSS 1 2 3 4 5 6 7 8 9 10 11 1...