82C37A Datasheet | Harris Corporation

SEMICONDUCTOR March 1997 CMOS High Performance Programmable DMA Controller Features Description - patible with the NMOS 8237A - Four Independent Maskable Channels with Autoinitialization Capability - Cascadable to any Number of Channels - High Speed Data Transfers: - Up to 4MBytes/sec with 8MHz Clock - Up to 6.25MBytes/sec with 12.5MHz Clock - Memory-to-Memory Transfers - Static CMOS Design Permits Low Power Operation - ICCSB = 10µA Maximum - ICCOP = 2mA/MHz Maximum - Fully TTL/CMOS patible - Internal Registers may be Read from Software The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using Harris’...