CD82C37A Overview
The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using Harris’ advanced 2 micron CMOS process. Pin patible with NMOS designs, the 82C37A offers increased functionality, improved performance, and dramatically reduced power consumption. The fully static design permits gated clock operation for even further reduction of power. The 82C37A controller can improve system performance by allowing external devices to transfer data directly to or from system memory. Memory-to-memory transfer capability is also provided, along with a memory block initialization feature. DMA requests may be generated by either hardware or software, and each channel is independently programmable with a variety of
CD82C37A Key Features
- patible with the NMOS 8237A - Four Independent Maskable Channels with Autoinitialization Capability - Cascadable to any
- Up to 4MBytes/sec with 8MHz Clock
- Up to 6.25MBytes/sec with 12.5MHz Clock - Memory-to-Memory Transfers - Static CMOS Design Permits Low Power Operation
- ICCSB = 10µA Maximum
- ICCOP = 2mA/MHz Maximum - Fully TTL/CMOS patible - Internal Registers may be Read from Software
