IP82C55A Datasheet | Harris Corporation

Description The Harris 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. The high performance and industry standard configuration of the 82C55A make it patible with the 80C86, 80C88 and other microprocessors. Static CMOS circuit design insures low operating power. TTL patibility over the full military temperature range and bus hold circuitry eliminate the need for pull-up resistors. The Harris advanced SAJI process results in performance equal to or greater than existing functionally equivalent products at a fraction of the power. June 1998 Features - Pin patible with NMOS 8255A - 24 Programmable I/O Pins - Fully TTL patible - High Speed, No “Wait State” Operation with 5MHz and 8MHz 80C86 and 80C88 - Direct Bit Set/Reset Capability - Enhanced Control Word Read Capability - L7 Process - 2.5m A Drive Capability on All I/O Ports - Low Standby Power (ICCSB) - - - . .10µA Ordering Information PART NUMBERS 5MHz 8MHz CP82C55A-5 IP82C55A-5 CS82C55A-5 IS82C55A-5 CD82C55A-5 ID82C55A-5 8406601QA CP82C55A IP82C55A CS82C55A IS82C55A CD82C55A ID82C55A 8406602QA PACKAGE 40 Ld PDIP 44 Ld PLCC 40 Ld CERDIP SMD# TEMPERATURE RANGE 0o C to 70o C -40o C to 85o C 0o C to 70o C -40o C to 85o C 0o C to 70o C -40o C to 85o C -55o C to 125o C -55o C to 125o C PKG. NO. E40.6 E40.6 N44.65 N44.65 F40.6 F40.6 F40.6 F40.6 J44.A J44.A MD82C55A-5/B MD82C55A/B 44 Pad MR82C55A-5/B MR82C55A/B CLCC 8406601XA 8406602XA SMD# Pinouts 82C55A (DIP) TOP VIEW PA0 PA3 PA2 PA1 PA0 RD CS GND A1 A0 PC7 PC6 PC5 PC4 PC0 PC1 PC2 PC3 PB0 PB1 PB2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 RD CS 82C55A (CLCC) TOP...