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74ACT139 - Dual 1-of-4 Decoder/Demultiplexer

General Description

The CD74AC139 and CD74ACT139 are dual 2-to-4-line decoders/demultiplexers that utilize the Harris Advanced CMOS Logic technology.

These devices contain two independent binary to one-of-four decoders, each with a single active LOW enable input (1E or 2E).

Key Features

  • Buffered Inputs.
  • Typical Propagation Delay - 5.4ns at VCC = 5V, TA = 25oC, CL = 50pF.
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015.
  • SCR-Latchup-Resistant CMOS Process and Circuit Design.
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption.
  • Balanced Propagation Delays.
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply.
  • ±24mA Output Drive Current - Fanout to 15.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data sheet acquired from Harris Semiconductor SCHS235 CD74AC139, CD74ACT139 Dual 2-to-4-Line Decoder/Demultiplexer Description The CD74AC139 and CD74ACT139 are dual 2-to-4-line decoders/demultiplexers that utilize the Harris Advanced CMOS Logic technology. These devices contain two independent binary to one-of-four decoders, each with a single active LOW enable input (1E or 2E). Data on the select inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four normally HIGH outputs to go LOW. If the enable input is HIGH, all four outputs remain HIGH. For demultiplexer operation, the enable input is the data input. The enable input also functions as a chip select when these devices are cascaded. September 1998 Features • Buffered Inputs • Typical Propagation Delay - 5.