HD49815TF
HD49815TF is Digital Camera Signal Processor manufactured by Hitachi Semiconductor.
- Part of the HD49815 comparator family.
- Part of the HD49815 comparator family.
Description
The HD49815TF is a CMOS IC that has been developed as a digital signal-processing IC for CCD-camera digital-signal-processing systems.
Functions
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- CCD-sensor drive-pulse generation (TG) Digital AGC (automatic gain control) Color signal separation circuit RGB matrix RGB gain RGB and Y gamma Color-difference matrix Enhancer RGB and Y setup Digital I/F (4:2:2) Zoom control Mirror reversal Synchronization signal generator for encoding (SSG) AWB, AE, and AF detection Two-channel 8-bit D/A converter
Features
- The HD49815TF provides camera-signal processing, TG, SSG, zoom, and D/A functions and other functions in a single chip and supports high system-integration level.
- In conjunction with the HD49323AF-01 (CDS/AGC + 10-bit ADC) and the control microputer, the HD49815TF forms a three-chip kit that can implement an optimal CCD-camera digital-signalprocessing system.
- The HD49815TF provides the zoom function and controls the 1- to 256- times linear zoom. It also provides the half-mirror function.
Features
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- Since the HD49815TF can be made patible with the former product, HD49811TFA, through software, a shorter development term is enabled.
- Since software controls AWB, AE, and AF, any protocol can be prepared according to the camera shooting conditions.
- Programmable TG enables use of any CCD device.
System Block Diagram
HD49815TF Lens CCD HD49323AF-01 CDS/AGC+ 10-bit ADC Input line memory Color processing Luminance processing Microprocessor I/F Zoom processing C-signal output Y-signal output R-Y/B-Y digital output Y-signal digital output
TG SSG V.Driver
Encode DAC
System control
AE (iris) control
AWB (white balance) control
8-bit single-chip microputer (H8 series)
Pin Arrangement
DSP_MCK
CPREF
XSG2
XSG1
XV4
XV3
XV2
XV1
XSUB DKF_LD T_CP(TEST) TY_K SDI SDCK SLD SDO EP(1) EP(2) BF HD_IN M_CK VDD VSS FV HD CBLK CSYNC SCBLK HSYNC ID IDP VDD VSS X1I X1O IDS MCK_S RESET
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