HD64433802FP
Key Features
- IRQ edge select register (IEGR) Bits 4 to 2 amended 62 63 to 65 65 67, 68 3.3.5 Interrupt Operations 3.4.2 Notes on Rewriting Port Mode Registers 3.4.3 Interrupt Request Flag Clearing Methods 74 79
- Interrupt enable register 1 (IENR1)
- Interrupt enable register 2 (IENR2)
- Interrupt request register 1 (IRR1)
- Interrupt request register 2 (IRR2) Figure 3.3 Flow up to Interrupt Acceptance Bits 6, 4, and 3 amended Bits 5, 4, and 1 amended Bits 6, 4, and 3 amended Bits 5, 4, and 1 amended Figure amended
