HD66420 Datasheet | Hitachi Semiconductor

Description The HD66420 drives and controls a dot matrix graphic LCD(Liquid Crystal Display) using a bit-mapped method. It provides a highly flexible display through its on-chip display RAM, in which each two bits of data can be used to turn on or off one dot on LCD panel with four-level grey scale. A single HD66420 can display a maximum of 160x80 dots using its powerful display control functions. It can display only eight lines out of eighty lines. This function realize low power consumption because high voltage for driving LCD is not needed. An MPU can access HD66420 at any time, because the MPU operations are asynchronous with the HD66420’s system clock and display operation. Its low-voltage operation at 2.2 to 5.5V and standby function provides low power dissipation, making the HD66420 suitable for small portable device applications. Features - - - - - - - - - - Built-in bit-mapped display RAM: 25.6kbits (160 × 80 × 2 bits) Grey scale display: PWM four-level grey scale can be selected from 32 levels Grey scale memory management: Packed pixel Partial display: Eight-lines data can be displayed in any place An 80-system MPU interface Power supply voltage for operation : 2.2V to 5.5V Power supply voltage for LCD : 13 V max. Selectable multiplex duty ratio: 1/8, 1/32, 1/64, 1/80 Built-in oscillator: external resister Low power consumption:  55µA typ. 80µA max. during display  0.1µA typ. 5µA max. during standby - Circuits for generating LCD driving voltage : Contrast control, Operational amplifier, and Resistive dividers - Internal resistive divider: programmable bias rate - 32-level programmable contrast control - Wide range of instructions reversible display, display on/off, vertical display scroll, blink, reversible address, read-modify-write mode - Package: TCP Ordering Information Type No. HD66420TA0 Package TCP Pin Arrangement GND1 VLCD1 VCC1 V5O V4O V3O V2O V1O GREF IREFM IREFP VLCD2 VLCD3 VCC2 GND2 GND3 VCC3 OSC1 OSC2 OSC CO DCON...