HD74AC107 Datasheet | Hitachi Semiconductor

HD74AC107/HD74ACT107 Dual JK Flip-Flop (with Separate Clear and Clock) Description The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop. Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows: 1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs; 4) transfer information from master to slave. Features - Outputs Source/Sink 24 mA - HD74ACT107 has TTL-patible Inputs Pin Arrangement J1 1 Q1 2 Q1 3 K1 4 Q2 5 Q2 6 GND 7 (Top...