• Part: HD74AC139
  • Description: Dual 1-of-4 Decoder/Demultiplexer
  • Manufacturer: Hitachi Semiconductor
  • Size: 61.14 KB
Download HD74AC139 Datasheet PDF
Hitachi Semiconductor
HD74AC139
HD74AC139 is Dual 1-of-4 Decoder/Demultiplexer manufactured by Hitachi Semiconductor.
Description The HD74AC139/HD74ACT139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually-exclusive active-Low outputs. Each decoder has an active-Low Enable input which can be used as a data input for a 4-output demultiplexer. Each half of the HD74AC139/HD74ACT139 can be used as a function generator providing all four minterms of two variables. Features - - - - - Multifunction Capability Two pletely Independent 1-of-4 Decoders Active Low Mutually Exclusive Outputs Outputs Source/Sink 24 m A HD74ACT139 has TTL-patible Inputs HD74AC139/HD74ACT139 Pin Arrangement Ea 1 A0a 2 A1a 3 O0a 4 O1a 5 O2a 6 O3a 7 GND 8 (Top view) 16 VCC 15 Eb 14 A0b 13 A1b 12 O0b 11 O1b 10 O2b 9 O3b Logic Symbol A0 A1 A0 A1 DECODER a DECODER b O0 O1 O2 O3 O0 O1 O2 O3 Pin Names A0, A1 E O0 to O 3 Address Inputs Enable Inputs Outputs HD74AC139/HD74ACT139 Logic Diagram Ea A0a A1a Eb A0b A1b O0a O1a O2a O3a O0b O1b O2b O3b Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Functional Description The HD74AC139/HD74ACT139 is a high-speed dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs (A 0 to A1) and provides four mutually exclusive active-Low outputs ( O0 to O3). Each decoder has an active-Low enable (E). When E is High all outputs are forced High. The enable can be used as the data input for a 4-output demultiplexer application. Each half of the HD74AC139/HD74ACT139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure a, and thereby reducing the number of packages required in a logic network. Truth Table Inputs E H L L L L H : L : X : A0 X L H L H High Voltage Level Low Voltage Level Immaterial A1 X L L H H...