HD74ACT125 Datasheet | Hitachi Semiconductor

Description The HD74AC125/HD74ACT125 is an quad buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter/receiver which provides improved PC board density. Features - 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers - Outputs Source/Sink 24 m A - HD74ACT125 has TTL-patible Inputs Pin Arrangement E 1 D 2 O 3 E 4 D 5 O 6 GND 7 (Top view) 14 VCC 13 E 12 D 11 O 10 E 9 D 8 O HD74AC125/HD74ACT125 Logic Symbol Pin Names D E O Data Inputs 3-State Output Enable Inputs (Active Low) Outputs Truth Table Inputs E L L H H L X Z : : : : High Voltage Level Low Voltage Level Immaterial High Impedance D L H X Output L H Z DC Characteristics (unless otherwise specified) Item Maximum quiescent supply current Maximum quiescent supply current Maximum ICC/input (HD74ACT125) Symbol I CC I CC I CCT Max 80 8.0 1.5 Unit µA µA m A Condition VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C VIN = VCC - 2.1 V, VCC = 5.5 V Ta = Worst case HD74AC125/HD74ACT125 AC Characteristics: HD74AC125 Ta = +25°C CL = 50 p F Item Propagation delay Symbol t PLH VCC (V)- 1 3.3 5.0 Propagation delay t PHL 3.3 5.0 Enable time t PZH 3.3 5.0 Enable time t PHZ 3.3 5.0 Disable time t PZL 3.3 5.0 Disable time t PLZ 3.3 5.0 Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Typ 6.5 5.5 6.5 5.0 6.0 5.0 7.5 5.5 7.0 6.5 7.5 6.5 Max 9.0 7.0 9.0 7.0 10.5 7.0 10.0 8.0 10.0 9.5 10.5 9.0 Ta = - 40°C to +85°C CL = 50 p F Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 10.0 7.5 10.0 7.5 11.0 8.0 11.0 8.5 10.5 9.5 11.5 9.5 Unit ns AC Characteristics: HD74ACT125 Ta = +25°C CL = 50 p F Item Propagation delay Propagation delay Enable time Enable time Disable time Disable time Note: Symbol t PLH t PHL t PZH t PZL t PHZ t PLZ VCC (V)- 1 5.0 5.0 5.0 5.0 5.0 5.0 Min 1.0 1.0 1.0 1.0 1.0 1.0 Typ 6.5 7.0 6.0 7.0 7.0 7.5...