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HD74ALVCH16820 - 3.3-V 10-bit Flip Flops with Dual Outputs

General Description

The flip flops of the HD74ALVCH16820 are edge triggered D-type flip flops.

On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

Key Features

  • VCC = 2.3 V to 3.6 V.
  • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C).
  • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C).
  • High output current ±24 mA (@V CC = 3.0 V).
  • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors HD74ALVCH16820 Function Table Inputs OEn.
  • 2 L L L H CLK ↑ ↑ L X D H L X X H L Q0.
  • 1 Z Output Qn.
  • 1 H : High level L : Low level X : Immaterial Z : High impedance ↑ : Low.

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📁 Similar Datasheet

Part Number Description Manufacturer
HD74ALVCH16820 3.3-V 10-bit Flip Flops Renesas
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HD74ALVCH162244 16-bit Buffers / Drivers Renesas
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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74ALVCH16821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs
HD74ALVCH16825 18-bit Buffers / Drivers with 3-state Outputs
HD74ALVCH16827 20-bit Buffers / Drivers with 3-state Outputs
HD74ALVCH16830 1-bit to 2-bit Address Driver with 3-state Outputs
HD74ALVCH16831 1-to 4 Address Register / Driver with 3-state Outputs

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HD74ALVCH16820 3.3-V 10-bit Flip Flops with Dual Outputs ADE-205-170B (Z) 3rd. Edition December 1999 Description The flip flops of the HD74ALVCH16820 are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic level) or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus lines significantly. The high impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE input does not affect the internal operation of the flip flops.