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HD74HC126 - Quad. Bus Buffer Gates

General Description

The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low to put the output into high impedance.

Key Features

  • High Speed Operation: tpd = 8 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs C HC125 H L L X : Z : HC126 L H H A X L H Output Y HC125 Z L H HC126 Z L H Irrelevent Off (high-impedance) state of a 3-state output. HD74HC125/HD74HC126 Pin Arrangement HD74HC125 1C 1A 1Y 2C 2A.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HD74HC125/HD74HC126 Quad. Bus Buffer Gates (with 3-state outputs) Description The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low to put the output into high impedance. Features • • • • • High Speed Operation: tpd = 8 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs C HC125 H L L X : Z : HC126 L H H A X L H Output Y HC125 Z L H HC126 Z L H Irrelevent Off (high-impedance) state of a 3-state output.