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HD74HC4515 - 4-bit Latch/4-to-16-line Decoder

General Description

This device presents 4-to-16 line decoder with latched inputs.

The HD74HC4515 presents a low level at the selected output.

This device consists of four storage latches with common strobe and inhibit (G) inputs.

Key Features

  • High Speed Operation: tpd (Data to S) = 20 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HC4515 Function Table (Strobe = High) Data Inputs Inhibit L L L L L L L L L L L L L L L L H D L L L L L L L L H H H H H H H H X C L L L L H H H H L L L L H H H H X B L L H H L L H H L L H H L L H H X A L.

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📁 Similar Datasheet

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HC4511 BCD-to-Seven Segment Latch/Decoder/Driver
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HD74HC4515 4-bit Latch/4-to-16-line Decoder Description This device presents 4-to-16 line decoder with latched inputs. The HD74HC4515 presents a low level at the selected output. This device consists of four storage latches with common strobe and inhibit (G) inputs. When a low signal is applied to the strobe input, the input data is stored, decoded, and presented to the output. When inhibit is high, all HD74HC4515 outputs are a high logic level.