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HD74HC77 - 4-bit Bistable Latch

General Description

The HD74HC77 is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units.

Key Features

  • High Speed Operation: tpd (D to Q) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs D L H X G H H L Output Q L H No change HD74HC77 Pin Arrangement 1D 1 2D 2 Enable3-4 3 VCC 4 3D 5 4D 6 NC 7 D D Q G G Q Q D G D G Q 14 1Q 13 2Q 12 Enable1-2 11 GND 10 NC 9 3Q 8 4Q (Top.

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📁 Similar Datasheet

Part Number Description Manufacturer
HD74HC77 4-bit Bistable Latch Renesas
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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HC73 Dual J-K Flip-Flops (with Clear)
HD74HC74 Dual D-type Flip-Flops (with Preset and Clear)
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HD74HC78 Dual J-K Flip-Flops (with Preset/ Common Clear and Common Clock)

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HD74HC77 4-bit Bistable Latch Description The HD74HC77 is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high.