HD74HCT125 - Quad. Bus Buffer Gates (with 3-state outputs)

Product Overview

Hitachi Semiconductor

Datasheet Details

Part number	HD74HCT125
Manufacturer	Hitachi Semiconductor
File Size	47.83 KB
Description	Quad. Bus Buffer Gates (with 3-state outputs)
Datasheet	HD74HCT125 Datasheet
Additional preview pages of the HD74HCT125 datasheet.

Product details

Description

The HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to be low to put the output into high impedance.

Features

LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Input C HCT125 H L L HCT126 L H H A X L H Output Y HD74HCT125 Z L H HD74HCT126 Z L H Notes: X: Irrelevan.

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Other Datasheets by Hitachi Semiconductor

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HD74HCT137 - 3-to-8-line Decoder/Demultiplexer with Address Latch
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Published: Mar 23, 2005 |