HD74LV245A Datasheet | Hitachi Semiconductor

Description The HD74LV245A has eight buffers with three-state outputs in a 20-pin package. When DIR is high, data is transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs to the A outputs. The A and B buses are separated by making the enable input (OE) high level. Lowvoltage operation is suitable for battery-powered products (e.g., notebook puters), and the low power consumption extends the battery life. Features - - - - - - VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±8 m A (@VCC = 3.0 V to 3.6 V), ±16 m A (@VCC = 4.5 V to 5.5 V) Function Table Inputs OE L L H Note: H: High level L: Low level X: Immaterial DIR L H X Operation B data to A bus A data to B bus Isolation Pin Arrangement DIR 1 A1 A2 2 3 20 VCC 19 OE 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 11 B8 A3 4 A4 A5 A6 A7 A8 5 6 7 8 9 GND 10 (Top view) Absolute Maximum Ratings Item Supply voltage range Input voltage range- 1 1, 2 Symbol VCC VI VO Ratings - 0.5 to 7.0 - 0.5 to 7.0 - 0.5 to VCC + 0.5 - 0.5 to 7.0 Unit V V V Conditions Output voltage range- - Output: H or L VCC: OFF or Output: Z Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Maximum power dissipation at Ta = 25°C (in still air)- 3 I IK I OK IO I CC or IGND PT - 20 ±50 ±35 ±70 835 757 m A m A m A m A m W VI < 0 VO < 0 or VO > VCC VO = 0 to VCC SOP TSSOP Storage temperature Tstg - 65 to 150 °C Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. This value is limited to...