Part HM51S4260C
Description 262144-word x 16-bit Dynamic Random Access Memory
Manufacturer Hitachi Semiconductor
Size 260.78 KB
Hitachi Semiconductor
HM51S4260C
HM51S4260C reference image

Representative HM51S4260C image (package may vary by manufacturer)

Overview

The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word × 16-bit. HM51(S)4260C has realized higher density, higher performance and various functions by employing 0.8 µm CMOS process technology and some new CMOS circuit design technologies.

  • Single 5 V (±10%) (HM51(S)4260C-6/7/8) (±5%) (HM51(S)4260C-6R) High speed - Access time: 60 ns/70 ns/80 ns (max) Low power dissipation - Active mode: 825 mW/788 mW/770 mW/688 mW (max) - Standby mode: 11 mW (max) (HM51(S)4260C-6/7/8) 10.5 mW (max) (HM51(S)4260C-6R) 1.1 mW (max) (L-version) (HM51(S)4260C-6/7/8) 1.05 mW (max) (L-version) (HM51(S)4260C-6R) Fast page mode capability 512 refresh cycles: 8 ms 128 ms (L-version) 2 CAS -byte control 2 variations of refresh - RAS -only refresh - CAS -before-RAS refresh Battery backup operation (L-version) Self refresh operation (HM51S4260C) * * * * *
  • HM514260C, HM51S4260C Series