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HN58C256A - 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function

General Description

The Hitachi HN58C256A and HN58C257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit.

They have realized high speed low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology.

Key Features

  • Single 5 V supply: 5 V ±10%.
  • Access time: 85 ns/100 ns (max).
  • Power dissipation  Active: 20 mW/MHz, (typ)  Standby: 110 µW (max).
  • On-chip latches: address, data, CE, OE, WE.
  • Automatic byte write: 10 ms max.
  • Automatic page write (64 bytes): 10 ms max.
  • Ready/Busy (only the HN58C257A series).
  • Data polling and Toggle bit.
  • Data protection circuit on power on/off.
  • Conforms to JEDEC byte-wide standard.

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📁 Similar Datasheet

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HN58C1001 1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function
HN58C65 8192-word X 8-bit Electrically Erasable and Programmable CMOS ROM
HN58S256A 256 k EEPROM (32-kword x 8-bit)
HN58S65A 64 k EEPROM (8-kword x 8-bit) Ready/Busy function
HN58V1001 1M EEPROM (128-kword x 8-bit) Ready/Busy and RES function

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HN58C256A Series HN58C257A Series 256k EEPROM (32-kword × 8-bit) Ready/Busy and RES function (HN58C257A) ADE-203-410D (Z) Rev. 4.0 Oct. 24, 1997 Description The Hitachi HN58C256A and HN58C257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit. They have realized high speed low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make their write operations faster.