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HN58V256A - 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function

General Description

The Hitachi HN58V256A and HN58V257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit.

They have realized high speed, low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology.

Key Features

  • Single 3 V supply: 2.7 to 5.5 V.
  • Access time: 120 ns max.
  • Power dissipation:  Active: 20 mW/MHz, (typ)  Standby: 110 µW (max).
  • On-chip latches: address, data, CE, OE, WE.
  • Automatic byte write: 10 ms max.
  • Automatic page write (64 bytes): 10 ms max.
  • Ready/Busy (only the HN58V257A series).
  • Data polling and Toggle bit.
  • Data protection circuit on power on/off.
  • Conforms to JEDEC byte-wide standard.
  • Re.

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Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HN58V256A Series HN58V257A Series 256k EEPROM (32-kword × 8-bit) Ready/Busy and RES function (HN58V257A) ADE-203-357D (Z) Rev. 4.0 Oct. 24, 1997 Description The Hitachi HN58V256A and HN58V257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit. They have realized high speed, low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make their write operations faster. Features • Single 3 V supply: 2.7 to 5.