628512LP Description
The Hitachi HM628512 is a 4-Mbit static RAM organized 512-kword × 8-bit. It realizes igher density, higher performance and low power consumption by employing 0.5 µm Hi-CMOS process technology. The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP, is available for high density mounting.
628512LP Key Features
- High speed: Fast access time: 55/65/70 ns (max)
- Low power Standby: 10 µW (typ) (L/L-SL version) Operation: 75 mW (typ) (f = 1 MHz)
- Single 5 V supply
- pletely static memory No clock or timing strobe required
- Equal access and cycle times
- mon data input and output: Three state output
- Directly TTL patible: All inputs and outputs
- Capability of battery backup operation (L/L-SL version)
- A18 I/O0
- I/O7 CS OE WE VCC VSS Function Address Input/output Chip select Output enable Write enable Power supply Ground