Hitachi HD6432641
The H8S/2643 Series is a series of microcomputers (MCUs: microcomputer units), built around the H8S/2600 CPU, employing Hitachi's proprietary architecture, and equipped with peripheral functions on-chip. The H8S/2600 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise, optimized instruction set designed for high-speed operation, and can address a 16-Mbyte linear address space.| Part No. | HD6432641 |
|---|---|
| Datasheet | HD6432641 Download |
| Manufacturer |  Hitachi |
| Description | 16-Bit Microcontroller |
| Buy | Stock & Price |
U.com t4 H8S/2641 e HD6432641 e H8S/2643 F-ZTAT™ h HD64F2643 taS Hardware Manual ww.Da ADE-602-214A Rev. 2.0 w3/20/01 Hitachi, Ltd. Section 1 Overview 1.1 Overview The instruction set is upward-compatible with H8/300 and H8/300H CPU instructions at the object-code level, facilitating migration from the H8/300, H8/300L, or H8/300H Series. On-chip peripheral functions required for system configuration include DMA controller (DMAC), data transfer controller (DTC) bus masters, ROM and RAM memory, a16-bit timer-pulse unit (TPU), programmable pulse generator (PPG), 8-bit timer, 14-bit PWM timer (PWM) watchdog timer (WDT), serial communication interface (SCI, IrDA), A/D converter, D/A converter, and I/O ports. It is also possible to incorporate an on-chip PC bus interface (IIC) as an option. On-chip ROM is available as 256-kbyte flash memory (F-ZTAT™ version)* or as 256-, 128-, or 64-kbyte mask ROM. ROM is connected to the CPU via a 16-bit data bus, enabling both byte and word data to be accessed in one state.
