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HD68A52 - Synchronous Serial Data Adapter

This page provides the datasheet information for the HD68A52, a member of the HD6852 Synchronous Serial Data Adapter family.

Datasheet Summary

Features

  • Programmable Interrupts from Transmitter, Receiver, and Error Detection Logic.
  • Character Synchronization on One or Two Sync Codes.
  • External Synchronization Available for Parallel.
  • Serial Operation.
  • Programmable Sync Code Register.
  • Up to 1Mkbps Transmitter.
  • Peripheral/Modem Control Functions.
  • Three Bytes of FIFO Buffering on Both Transmit and Receive.
  • 6, 7, or B Bit Data Transmission.
  • Optional Even and Odd Parit.

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Datasheet preview – HD68A52

Datasheet Details

Part number HD68A52
Manufacturer Hitachi
File Size 1.40 MB
Description Synchronous Serial Data Adapter
Datasheet download datasheet HD68A52 Datasheet
Additional preview pages of the HD68A52 datasheet.
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Full PDF Text Transcription

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HD6852, HD68A52 SSDA (Synchronous Serial Data Adapter) The HD6852 Synchronous Serial Data Adapter provides a bi·directional serial interface for synchronous data information interchange. It contains interface logic for simultaneously transmitting and receiving standard synchronous communica· tions characters in bus organized systems such as the HMCS6800 Microprocessor systems. The bus interface of the HD6852 includes select, enable, read/write, interrupt, and bus interface logic to allow data transfer over an 8-bit bi·directional data bus. The parallel data of the bus system is serially transmitted and received by the synchronous data interface with synchronization, fill charar-ter insertion/deletion, and error checking.
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