Hitachi HD74AC138
The HD74AC138/HD74ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three HD74AC138/HD74ACT138 devices or a 1-of-32 decoder using four HD74AC138/HD74ACT138 devices and one inverter.| Part No. | HD74AC138 |
|---|---|
| Datasheet | HD74AC138 Download |
| Manufacturer |  Hitachi |
| Description | 1-of-8 Decoder/Demultiplexer |
| Buy | Stock & Price |
DESCRIPTION
FEATURES
●●
●
●
● Demultiplexing Capability Multiple Input Enable for Easy Expansion Active LOW Mutually Exclusive Outputs Outputs Source/Sink 24 mA HD74ACT138 has TTL-Compatible Inputs HD74AC138/HD74ACT138 Pin Arrangement A0 1 A1 2 A2 3 E1 4 E2 5 E3 6 O7 7 GND 8 (Top view) 16 VCC 15 O0 14 O1 13 O2 12 O3 11 O4 10 O5 9 O6 Logic Symbol A0 A1 A2 E1 E2 E3 O0 O1 O2 O3 O4 O5 O6 O7 Pin Names A0 to A2 E1 to E 2 E3 O0 to O 7 Address Inputs Enable Inputs Enable Input Outputs 2 HD74AC138/HD74ACT138 Functional
DESCRIPTION
The HD74AC138/HD74ACT138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active-LOW outputs (O0 to O7). The HD74AC138/HD74ACT138 features three Enable inputs, two active-Low (E1, E2) and one active-High (E3). All outputs will be High unless E1 and E2 are Low and E 3 is High. This multiple enabled function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four HD74AC138/HD74ACT138 devices and one inverter (See Figure a).
