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HD74ALVCH16260 Datasheet PDF

Hitachi HD74ALVCH16260

The HD74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. This device is also useful in memory interleaving applications. The output enable (OE1B, OE2B, and OEA) inputs control the bus transceiver functions.
Part No. HD74ALVCH16260
Datasheet HD74ALVCH16260 Download
Manufacturer
Hitachi
Description 12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs
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HD74ALVCH16260 datasheet page 1 preview

DESCRIPTION

Typical applications include multiplexing and / or demultiplexing of address and data information in microprocessor or bus interface applications. Three 12-bit I / O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and / or data transfer. The OE1B and OE2B control signals also allow bank control in the A-to-B direction. Address and / or data information can be stored using the internal storage latches. The latch enable (LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage. When the latch enable input is high, the latch is transparent. When the latch enable input goes low, the data present at the inputs is latched and remains latched until the latch enable input is returned high. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

FEATURES

● VCC = 2.3 V to 3.6 V
● Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
● Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
● High output...
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