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HD74HC195 Datasheet PDF

Hitachi HD74HC195

This shift register features parallel inputs, parallel outputs, J-K serial inputs, Shift/Load control input, and a direct overriding clear. This shift register can operate in two modes: Parallel load; shift from QA towards QD.
Part No. HD74HC195
Datasheet HD74HC195 Download
Manufacturer
Hitachi
Description 4-bit Parallel-Access Shift Register
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HD74HC195 datasheet page 1 preview

DESCRIPTION

Paralle loading is accomplished by applying the four bits of data, and taking the Shift/Load control Input low. The data is loaded into the associated flip-flops and appears at the outputs after the positive transition of the clock input. During parallel loading, serial data flow is inhibited. Serial shifting occurs synchronously when the Shift/Load control input is high. Serial data for this mode is entered at the J-K inputs. These inputs allow the first stage to perform as a J-K or toggle flip-flop as shown in the function table.

FEATURES

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● High Speed Operation: tpd (Clock to Q) = 13 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HC195 Function Table Inputs Shift/ Serial K X X X H L H L Parallel A X a X X X X X B X b X X X X X C X c X X X X X D X d X X X X X Outputs QA L a QA0 QA0 L H QAn QB L b QB0 QA0 QAn QAn...
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