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HD74HC490 Datasheet PDF

Hitachi HD74HC490

This circuit contains eight master-slave flip-flops and additional gating to implement two individual 4-bit decade counters. Each decade counter has individual clock, clear and set-to-9 inputs.
Part No. HD74HC490
Datasheet HD74HC490 Download
Manufacturer
Hitachi
Description Dual 4-bit Decade Counters
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HD74HC490 datasheet page 1 preview

DESCRIPTION

BCD count sequences of any length up to divide-by-100 may be implemented with a single HD74HC490. Buffering on each output is provided to ensure that suceptibility to collector communication is reduced significantly. The counters have paralle outputs from each counter state so that submultiples of the input count frequency are available for system timing signals.

FEATURES

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● High Speed Operation: tpd (Clock to QA) = 13 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clear/Set-To-9 Inputs Clear H L L Set-To-9 L H L Outputs QA L H Count QB L L QC L L QD L H HD74HC490 BCD Count Sequence Outputs Count 0 1 2 3 4 5 6 7 8 9 QD L L L L L L L L H H QC L L L L H H H H L L QB L L H H L L H H L L QA L H L H L H L H L H Pin Arrangement 1Clock 1Clear 1QA Output 1 Setto-9 1QB Outputs 1QC 1QD GND 1 2 3 4 CK CLR QA CLR Q...
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