Hitachi HD74HC76
This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.DESCRIPTION
Each flip-flop has independent J, K, preset, clear, and clock inputs and Q and Q outputs. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input.FEATURES
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● High Speed Operation: tpd (Clock to Q) = 21 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs Preset L H L H H H H H H H Note: Clear H L L H H H H H H H L H Clock X X X J X X X L L H H X X X K X X X L H L H X X X Outputs Q H L H* 1 Q L H H*1 No change L H Toggle No change No change No change H L 1. Q and Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset and Clear go HIGH simultaneously. HD74HC76 Pin Arrangement 1CK 1 1PR 2 1CLR 3 1J 4 VCC 5 2CK 6 2PR 7 2CLR 8 (Top view) K CK J CLR Q PR Q J CK K PR Q CLR Q 16 1K 15 1Q 14 1Q 13 GND 12 2K 11 2Q 1...