Description
Area 5.
Avoid reading/writing from/to the free addresses without registers in the on-chip peripheral module space (area 5: H'5000000-H'5FFFFFF).
Features
- internal block diagram, pin layout, pin functions Register configuration, data structure. instruction features, instruction types, instruction lists MCU mode, PROM mode Resets, address errors, interrupts, trap instructions, illegal instructions NMI interrupts, user break interrupts, IRQ interrupts, on-chip module interrupts Break address and break bus cycles selection Crystal pulse generator, duty correction circuit Division of memory space, DRAM interface, refresh, wait state control, parity c.
SH7021 Datasheet
