HD61202U Datasheet | Hitachi Semiconductor

Description HD61202U is a column (segment) driver for dot matrix liquid crystal graphic display systems. It stores the display data transferred from a 8-bit micro controller in the internal display RAM and generates dot matrix liquid crystal driving signals. Each bit data of display RAM corresponds to on/off state of a dot of a liquid crystal display to provide more flexible than character display. As it is internally equipped with 64 output drivers for display, it is available for liquid crystal graphic displays with many dots. The HD61202U, which is produced in the CMOS process, can plete portable battery drive equipment in bination with a CMOS micro-controller, utilizing the liquid crystal display’s low power dissipation. Moreover it can facilitate dot matrix liquid crystal graphic display system configuration in bination with the row (mon) driver HD61203U. Features - Dot matrix liquid crystal graphic display column driver incorporating display RAM - RAM data direct display by internal display RAM  RAM bit data 1: On  RAM bit data 0: Off - Display RAM capacity: 512 bytes (4096 bits) - 8-bit parallel interface - Internal liquid crystal display driver circuit: 64 - Display duty cycle Drives liquid crystal panels with 1/32- 1/64 duty cycle multiplexing - Wide range of instruction function Display data read/write, display on/off, set address, set display start line, read status - Power supply: VCC: 2.7V~5.5V - Liquid crystal display driving voltage: 8V to 16V Ordering Information Type No. HD61202UFS HD61202UTE HCD61202U Package 100-pin plastic QFP (FP-100A) 100-pin thin plastic QFP (TFP-100B) Chip Y42 31 Y41 32 Y40 33 Y39 34 Y38 35 Y37 36 Y36 37 Y35 38 Y34 39 Y33 40 Y32 41 Y31 42 Y30 43 Y29 44 Y28 45 Y27 46 Y26 47 Y25 48 Y24 49 Y23 50 100 FRM 99 E 98 ø1 97 ø2 96 CL 95 D/I 94 R/W 93 RST 92 CS1 91 CS2 90 CS3 89 NC 88 NC 87 NC 86 DB7 85 DB6 84 DB5 83 DB4 82 DB3 81 DB2 Pin Arrangement ADC 1 M2 V4R 4 V3R 5 V2R 6 V1R 7 VEE2 Y64...