HD74AC259 Datasheet | Hitachi Semiconductor

Description The HD74AC259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable or storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device also incorporates an active LOW mon Clear for resetting all latches, as well as an active LOW Enable. Features - - - - - - - Serial-to-Parallel Conversion Eight Bits of Storage with Output of Each Bit Available Random (Addressable) Data Entry Active High Demultiplexing or Decoding Capability Easily Expandable mon Clear Outputs Source/Sink 24 m A Pin Arrangement A0 1 A1 2 A2 3 Q0 4 Q1 5 Q2 6 Q3 7 GND 8 (Top view) 16 VCC 15 MR 14 E 13 D 12 Q7 11 Q6 10 Q5 9 Q4 Logic Symbol E A0 A1 A2 MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Pin Names A0 - A2 D E MR Q0 - Q7 Address Inputs Data Inputs Enable Input (Active LOW) Master Reset (Active LOW) Latch Outputs Logic Diagram Q7 Q6 Q5 MR Q4 A2 A1 Q3 A0 Q2 Q1 D Q0 Function Table Inputs Operating Mode Master reset Demultiplex (Active HIGH Decoder when D = H) MR E L L L L L L L L L Store (Do nothing) Addressable latch H H H H H H H H H H L X d q : : : : : H L L L L L L L L H L L L L L L L L D X d d d d d d d d X d d d d d d d d A0 X L H L H L H L H X L H L H L H L H A1 X L L H H L L H H X L L H H L L H H A2 X L L L L H H H H X L L L L H H H H Outputs Q0 L Q1 L Q2 L L Q3 L L L Q4 L L L L Q5 L L L L L Q6 L L L L L L Q7 L L L L L L L Q=d L L L L L L L L q0 Q=d L L L L L L L q1 Q=d L L L L L L q2 q2 Q=d L L L L L q3 q3 q3 Q=d L L L L q4 q4 q4 q4 Q=d L L L q5 q5 q5 q5 q5 Q=d L L q6 q6 q6 q6 q6 q6 Q=d q7 q7 q7 q7 q7 q7 q7 Q = d q1 q0 q0 q0 q0 q0 q0...