HD74ALVCH16260 Datasheet | Hitachi Semiconductor

Description The HD74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and / or demultiplexing of address and data information in microprocessor or bus interface applications. This device is also useful in memory interleaving applications. Three 12-bit I / O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and / or data transfer. The output enable (OE1B, OE2B, and OEA) inputs control the bus transceiver functions. The OE1B and OE2B control signals also allow bank control in the A-to-B direction. Address and / or data information can be stored using the internal storage latches. The latch enable (LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage. When the latch enable input is high, the latch is transparent. When the latch enable input goes low, the data present at the inputs is latched and remains latched until the latch enable input is returned high. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Features - VCC = 2.3 V to 3.6 V - Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) - Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) - High output current ±24 m A (@V CC = 3.0 V) - Bus hold on data inputs eliminates the need for external pullup / pulldown resistors Function Table Inputs 1B H L X X X X X 2B X X X H L X X SEL H H H L L L X LE1B H H L X X X X LE2B X X X H H L X OEA L L L L L L H H L A0 - 1 H L A0 - 1 Z Output A B-to-A (OEB = H) Inputs A H L H L H L X X X X X LEA1B H H H H L L L X X X X LEA2B H H L L H H L X X X X OE1B L L L L L L L H L H L OE2B L L L L L L L H H L L Outputs 1B H L H L 1B0 - 1 1B0 1B0 Z Active Z Active - 1 - 1 2B H L 2B0 - 1 2B0 - 1 H L 2B0 - 1 Z Z Active Active A-to-B (OEA = H) H : High level L : Low level X : Immaterial Z : High impedance Note: 1. Output...