HD74HC353 Datasheet | Hitachi Semiconductor

Description Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs (G) are provided for each of the two fourline sections. The three-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the mon output disabled (at a high-impedance state) the low-impedance of the single enable output will drive the bus line to a high or low logic level. Each output has its own strobe (G). The output is disabled when its strobe is high. Features - - - - - High Speed Operation: tpd (Data to Y) = 13 ns typ (CL = 50 p F) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Select Input B X L L L L H H H H A X L L H H L L H H Data Inputs C0 X L H X X X X X X C1 X X X L H X X X X C2 X X X X X L H X X C3 X X X X X X X L H Output Control Output G H L L L L L L L L Y Z H L H L H L H L Select inputs A and B are mon to both sections Pin Arrangement Output 1G control Select B 1C3 1C2 1C1 1C0 Output 1Y GND 1 2 3 4 5 6 7 8 (Top view) 16 15 14 13 12 11 10 9 VCC Output 2G control Select A 2C3 2C2 2C1 2C0 Output 2Y Logic Diagram 1G 1C0 1Y 1C1 1C2 1C3 B A 2C0 2C1 2C2 2Y 2C3 2G DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = - 40 to +85°C Max - - - 0.5 1.35 1.8 - - - - - 0.1 0.1 0.1 0.33 0.33 ±1.0 40 µA µA I OL = 4 m A I OL = 5.2 m A Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA V I OH = - 4 m A I OH = - 5.2 m A Vin = VIH or VIL I OL = 20 µA V Vin = VIH or VIL I OH = - 20 µA V Unit V Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 1.5 - 3.15 - 4.2 - - - - - - - -...