HD74HC374 Datasheet | Hitachi Semiconductor

Description These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Features - - - - - High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 p F) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Output Control L L L H X : Z : L X Clock D H L X X HD74HC374 Q H L No change Z HD74HC534 Q L H No change Z irrelevant off (high-impedance) state of a 3-state output. HD74HC374/HD74HC534 Pin Arrangement Out put Control 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 (Top view) 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 Clock HD74HC534 Out put Control 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 (Top view) 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 Clock HD74HC374/HD74HC534 Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage DC current drain per pin DC current drain per VCC , GND DC input diode current DC output diode current Power Dissipation per package Storage temperature Symbol VCC VIN VOUT I OUT I CC, I GND I IK I OK PT Tstg Rating - 0.5 to +7.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 - 65 to +150 Unit V V V m A m A m A m A m W °C Block Diagram 1D D Q C Q Clock 2D D Q C Q 3D D Q C Q 4D D Q C Q 5D D Q C Q 6D D Q C Q 7D D Q C Q 8D D Q C Q Output Control 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q HD74HC374/HD74HC534 HD74HC534 1D D Q C Q Clock 2D D Q C Q 3D D...