HD74HC648 Datasheet | Hitachi Semiconductor

Description Six control inputs enable this device to be used as a latched transceiver, unlatched transceiver or a bination of both. As a latched transceiver, data from one bus is stored for later retrieval by the other bus. Alternately real time bus data (unlatched) may be directly transferred from one bus to another. Circuit operation is determined by the Control G, Direction, Clock AB, Clock BA, Select AB, Select BA control inputs. The enable input, Contorl G, controls whether any bus outputs are enabled. The direction control Direction (DIR), determines which bus is enabled, and hence the direction data flows: The Select AB, Select BA inputs cotrol whether the latched data (stored in D type flip-flops), or the bus data (from other bus input pins) is transferred. Each set of flip-flops has its own clock Clock AB and Clock BA, for storing data. Data is latched on the rising edge of the clock. Features - - - - - High Speed Operation: tpd (Bus to Bus) = 14 ns typ (CL = 50 p F) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HC646/HD74HC648 Function Table Inputs Control G H H L L L L L L Clock Select Data I/O Data I/O Operation or Function HD74HC648 Isolation Store A & B data B real-time data to A bus B stored data to A bus B stored data to A bus A real-time data to B bus A stored data to B bus A stored data to B bus Direction BA AB AB X X L L L H H H X H L X H L X H L X H L X X X H X X X L H H BA A1 thru A8 B1 thru B8 HD74HC646 X H L H H X X X Z (Input) Z (Input) Output Output Output Z (Input) Z (Input) Z (Input) Z (Input) Z (Input) Z (Input) Z (Input) Z (Input) Output Output Output Isolation Store A & B data B real-time data to A bus B stored data to A bus B stored data to A bus A real-time data to B bus A stored data to B bus A stored data to B bus Bus A Bus A Bus B Real-time transfer Bus B to Bus A Real-time transfer Bus A...