HD74HC73 Datasheet | Hitachi Semiconductor

Description The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at thte data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and acplished by a low level at the appropriate input. Features - - - - - High Speed Operation: tpd (Clock to Q or Q) = 14 ns typ (CL = 50 p F) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs Preset L H L H H H H H Note: Clear H L L H H H H H L H Clock X X X Data X X X H L X X X Outputs Q H L H- H L no change no change no change Q L H H- 1 L H no change no change no change 1. Q and Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset and Clear go HIGH simultaneously. HD74HC74 Pin Arrangement 1CLR 1 1D 2 1CK 3 1PR 4 1Q 5 1Q 6 GND 7 (Top view) D CLR Q CK PR Q CK PR Q D CLR Q 14 VCC 13 2CLR 12 2D 11 2CK 10 2PR 9 2Q 8 2Q Logic Diagram (1/2) PR CLR CK D # CK CK # CK # CK CK CK CK CK # CK # CK Q HD74HC74 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = - 40 to +85°C Max - - - 0.5 1.35 1.8 - - - - - 0.1 0.1 0.1 0.33 0.33 ±1.0 20 µA µA I OL = 4 m A I OL = 5.2 m A Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA V I OH = - 4 m A I OH = - 5.2 m A Vin = VIH or VIL I OL = 20 µA V Vin = VIH or VIL I OH = - 20 µA V Unit V Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 1.5 - 3.15 - 4.2 - - - - - - - - - - 0.5 1.5 3.15 4.2 - VIL 2.0 4.5...