HD74HCT688 Datasheet | Hitachi Semiconductor

Description The HD74HCT688 pares bit for bit two 8-bit words and indicate whether or not they are equal. The P=Q output indicates equality when it is low. A single active low enable is provided to facilitate cascading of several packages and enable parison of words greater than 8 bits. This device is useful in memory block decoding applications, where memory block enable signals must be generated from puter address information. Features - - - - - - LSTTL Output Logic Level patibility as well as CMOS Output patibility High Speed Operation: tpd (Data to P=Q) = 18 ns typ (CL = 50 p F) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs Data P, Q P=Q P>Q P<Q X Enable G L L L H P=Q L H H H Pin Arrangement G P0 Q0 P1 Q1 P2 Q2 P3 Q3 1 2 3 4 5 6 7 8 9 20 VCC 19 P=Q 18 Q7 17 P7 16 Q6 15 P6 14 Q5 13 P5 12 Q4 11 P4 (Top view) GND 10 Block Diagram P0 Q0 P1 Q1 P2 Q2 P3 Q3 P4 P=Q Q4 P5 Q5 P6 Q6 P7 Q7 G DC Characteristics Ta = 25°C Item Input voltage Symbol VIH VIL Output voltage VOH Ta = - 40 to +85°C Max - 0.8 - - 0.1 0.33 ±1.0 40 µA µA V Unit V V V Test Conditions VCC (V) 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 5.5 Vin = VIH or VIL I OH = - 20 µA I OH = - 4 m A Vin = VIH or VIL I OL = 20 µA I OL = 4 m A Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA Min Typ Max Min 2.0 - 4.4 - - - - 2.0 - - - 4.4 4.13 - VOL - - Input current Iin - - - - - - - 0.26 - ±0.1 - 4.0 - Quiescent current I...